Układ CPLD LCMXO2-7000HC-4TG144I, 144-Pin, MachXO2, Flash, ISP, 2,375 → 3,465 V, TQFP, -40 → +125°C |
Lattice Semiconductor |
LCMXO2-7000HC-4TG144I |
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Układ CPLD LCMXO2-7000HC-4TG144I, 144-Pin, MachXO2, Flash, ISP, 2,375 → 3,465 V, TQFP, -40 → +125°C |
Lattice Semiconductor |
LCMXO2-7000HC-4TG144I |
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Układ CPLD LCMXO640C-5TN100C, 100-Pin, MachXO, SRAM, ISP, 1,71 → 3,465 V, TQFP, 0 → +85°C |
Lattice Semiconductor |
LCMXO640C-5TN100C |
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FPGA LFE2-12E-5FN256C ECP2, 256-Pin, 12000-CLB, 24576bit, 1,14 → 1,26 V, FBGA, Lattice Semiconductor |
Lattice Semiconductor |
LFE2-12E-5FN256C |
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FPGA LFE2-12E-5FN256C ECP2, 256-Pin, 12000-CLB, 24576bit, 1,14 → 1,26 V, FBGA, Lattice Semiconductor |
Lattice Semiconductor |
LFE2-12E-5FN256C |
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FPGA LFE2-12E-5TN144C ECP2, 144-Pin, 12000-CLB, 24576bit, 1,14 → 1,26 V, TQFP, Lattice Semiconductor |
Lattice Semiconductor |
LFE2-12E-5TN144C |
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FPGA LFE2-12E-5TN144C ECP2, 144-Pin, 12000-CLB, 24576bit, 1,14 → 1,26 V, TQFP, Lattice Semiconductor |
Lattice Semiconductor |
LFE2-12E-5TN144C |
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FPGA LFE3-17EA-6FTN256C ECP3, 256-Pin, 17000-CLB, 700kbit, 1,14 → 1,26 V, FTBGA, Lattice Semiconductor |
Lattice Semiconductor |
LFE3-17EA-6FTN256C |
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FPGA LFE3-17EA-6FTN256C ECP3, 256-Pin, 17000-CLB, 700kbit, 1,14 → 1,26 V, FTBGA, Lattice Semiconductor |
Lattice Semiconductor |
LFE3-17EA-6FTN256C |
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FPGA LFXP2-5E-5TN144C XP2, 144-Pin, 5000-CLB, 10240bit, 1,14 → 1,26 V, TQFP, Lattice Semiconductor |
Lattice Semiconductor |
LFXP2-5E-5TN144C |
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FPGA LFXP2-5E-5TN144C XP2, 144-Pin, 5000-CLB, 10240bit, 1,14 → 1,26 V, TQFP, Lattice Semiconductor |
Lattice Semiconductor |
LFXP2-5E-5TN144C |
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Programowalna matryca logiczna TIBPAL20L8-25CNT, 50MHz 25ns 4,75 → 5,25 V 24-Pin PDIP |
Texas Instruments |
TIBPAL20L8-25CNT |
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Układ CPLD XC2C128-7VQG100C, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, 0 → +70°C, Xilinx |
Xilinx |
XC2C128-7VQG100C |
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Układ CPLD XC2C128-7VQG100C, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, 0 → +70°C, Xilinx |
Xilinx |
XC2C128-7VQG100C |
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Układ CPLD XC2C128-7VQG100I, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, -40 → +85°C, Xilinx |
Xilinx |
XC2C128-7VQG100I |
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Układ CPLD XC2C256-6VQG100C, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, 0 → +70°C, Xilinx |
Xilinx |
XC2C256-6VQG100C |
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Układ CPLD XC2C256-6VQG100C, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, 0 → +70°C, Xilinx |
Xilinx |
XC2C256-6VQG100C |
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Układ CPLD XC2C256-7PQG208I, 208-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, PQFP, -40 → +85°C, Xilinx |
Xilinx |
XC2C256-7PQG208I |
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Układ CPLD XC2C256-7VQG100C, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, 0 → +70°C, Xilinx |
Xilinx |
XC2C256-7VQG100C |
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Układ CPLD XC2C256-7VQG100C, 100-Pin, CoolRunner II, ISP, 1,7 → 1,9 V, VTQFP, 0 → +70°C, Xilinx |
Xilinx |
XC2C256-7VQG100C |
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